Table of Contents
Today, we will share Boolean Algebra Notes for SSC – The Mathematical Logic Behind Every Computer, SSC Computer Boolean Algebra PPT Slides (LEC #15), Every time a processor decides whether to execute the next instruction, every time a search engine filters results, every time a password is verified, Boolean algebra is working silently in the background. It is the mathematical language of digital logic, and it forms the theoretical foundation for all computer hardware from the simplest gate to the most complex CPU.
Lecture 15 of the Complete Foundation Batch for All SSC (Staff Selection Commission) and Other Exams PPT Series is dedicated entirely to Boolean Algebra (बूलियन बीजगणित / बूलीय बीजगणित) with 47 focused PPT slides. This module builds directly on LEC 12 (Data Representation) and LEC 14 (Number System Conversion), completing the mathematical foundation of the series.
Whether you are searching for Boolean algebra notes for SSC, Boolean algebra laws and theorems, De Morgan’s theorem, logic gate truth tables, Karnaugh map simplification, Boolean expression simplification, or a free Boolean algebra PDF for competitive exams, this article covers all of it systematically. Let us master the mathematics that makes computers think.
| Detail | Information |
| Subject | Boolean Algebra (बूलियन बीजगणित / बूलीय बीजगणित) |
| Lecture Number | LEC 15 |
| Total Slides | 47 PPT Slides |
| File Size | 25 MB |
| Series Name | Complete Foundation Batch for All SSC and Other Exams (PPT Series) |
| Serial Number | #015 |
| Best For | SSC CGL, CHSL, CPO, JE Computer Science, Banking, and all competitive exams |
| Language | English + Hindi (Bilingual) |
| Format | PPT / PDF |
| Website | https://slideshareppt.net/ |
SSC Computer Boolean Algebra PPT Slides (LEC #15)
NOTE: IF YOU WANT TO DOWNLOAD COMPLETE SSC SERIES – JUST VISIT THIS REDIRECT PAGE
What Is Boolean Algebra? Definition and Historical Background
Boolean algebra is a branch of algebra in which variables can only take two possible values: 0 (False) and 1 (True). Unlike ordinary algebra where variables can take any numerical value, Boolean algebra is strictly binary. It was developed by the English mathematician George Boole (1815-1864) and later applied to digital circuits by Claude Shannon in 1937.
In Hindi, Boolean algebra is called Booliyan Beejaganit (बूलियन बीजगणित) or Booleey Beejaganit (बूलीय बीजगणित). The term honors George Boole, whose work ‘An Investigation of the Laws of Thought’ (1854) laid the foundation for this entire field.
| Aspect | Detail |
| Definition | Mathematical system with variables that take only two values: 0 (False/OFF) and 1 (True/ON) |
| Hindi Name | बूलियन बीजगणित / बूलीय बीजगणित |
| Developed By | George Boole (English mathematician, 1815-1864) |
| Key Work | An Investigation of the Laws of Thought (1854) |
| Applied to Electronics By | Claude Shannon (American engineer, 1937) – his thesis connected Boolean algebra to digital circuits |
| Variables | Boolean variables can only be 0 (False, Low, OFF) or 1 (True, High, ON) |
| Basic Operations | AND (multiplication), OR (addition), NOT (complement/inversion) |
| Application | Design and analysis of digital circuits, logic gates, processors, computer programs |
| Why Important for SSC | Directly tested in SSC CGL, CPO, and heavily in SSC JE Computer Science |
Boolean Variables and Basic Concepts
Before studying the laws and theorems, you must thoroughly understand the foundational concepts of Boolean algebra:
| Concept | Symbol / Notation | Definition | Examples |
| Boolean Variable | A, B, C, X, Y, Z | A symbol that represents a quantity having only two possible values: 0 or 1 | A = 0 (OFF state), A = 1 (ON state); like a switch being open or closed |
| Boolean Complement (NOT) | A’ or A-bar or NOT A | The inverse of a Boolean variable; if A=0 then A’=1; if A=1 then A’=0 | NOT 0 = 1; NOT 1 = 0; complement of any variable |
| Boolean AND (Logical Product) | A · B or AB | Output is 1 ONLY when ALL inputs are 1; otherwise 0 | 0·0=0; 0·1=0; 1·0=0; 1·1=1 |
| Boolean OR (Logical Sum) | A + B | Output is 1 when AT LEAST ONE input is 1; 0 only when all inputs are 0 | 0+0=0; 0+1=1; 1+0=1; 1+1=1 |
| Boolean Expression | F = A·B + C | A combination of Boolean variables and operations that describes a logic function | F = AB + A’C; G = (A+B)·(A’+C) |
| Literal | A or A’ | A single Boolean variable in complemented or uncomplemented form | In expression AB’+C, the literals are: A, B’, C (3 literals) |
| Min-term | Canonical product term | A product term where all variables appear exactly once (complemented or uncomplemented) | For 2 variables A,B: minterms are A’B’, A’B, AB’, AB |
| Max-term | Canonical sum term | A sum term where all variables appear exactly once | For 2 variables A,B: maxterms are A+B, A+B’, A’+B, A’+B’ |
Logic Gates: The Physical Implementation of Boolean Algebra
Logic gates are electronic circuits that implement Boolean operations. Each gate takes one or more binary inputs and produces a binary output according to its Boolean function. Understanding gates and their truth tables is essential for both SSC and practical digital electronics:
AND Gate
Boolean Expression: F = A · B (read as ‘A AND B’)
Rule: Output is 1 ONLY when ALL inputs are 1. Even one 0 input makes output 0.
| Input A | Input B | Output F = A · B | Explanation |
| 0 | 0 | 0 | Both OFF: lamp does not glow |
| 0 | 1 | 0 | A is OFF: lamp does not glow |
| 1 | 0 | 0 | B is OFF: lamp does not glow |
| 1 | 1 | 1 | Both ON: lamp glows |
OR Gate
Boolean Expression: F = A + B (read as ‘A OR B’)
Rule: Output is 1 when AT LEAST ONE input is 1. Output is 0 only when ALL inputs are 0.
| Input A | Input B | Output F = A + B | Explanation |
| 0 | 0 | 0 | Both OFF: lamp does not glow |
| 0 | 1 | 1 | B is ON: lamp glows |
| 1 | 0 | 1 | A is ON: lamp glows |
| 1 | 1 | 1 | Both ON: lamp glows |
NOT Gate (Inverter)
Boolean Expression: F = A’ (read as ‘NOT A’ or ‘A complement’ or ‘A bar’)
Rule: Output is the OPPOSITE of the input. Inverts the signal.
| Input A | Output F = A’ | Explanation |
| 0 | 1 | Switch OFF → Output ON |
| 1 | 0 | Switch ON → Output OFF |
NAND Gate (NOT AND – Universal Gate)
Boolean Expression: F = (A · B)’ = A’ + B’ (by De Morgan’s theorem)
Rule: Opposite of AND. Output is 0 ONLY when ALL inputs are 1.
IMPORTANT: NAND is called a Universal Gate because ANY Boolean function can be implemented using ONLY NAND gates.
| Input A | Input B | A · B | Output F = (A · B)’ | Key Point |
| 0 | 0 | 0 | 1 | NAND of 0,0 = 1 (opposite of AND) |
| 0 | 1 | 0 | 1 | NAND of 0,1 = 1 |
| 1 | 0 | 0 | 1 | NAND of 1,0 = 1 |
| 1 | 1 | 1 | 0 | NAND of 1,1 = 0 (only case output is 0) |
NOR Gate (NOT OR – Universal Gate)
Boolean Expression: F = (A + B)’ = A’ · B’ (by De Morgan’s theorem)
Rule: Opposite of OR. Output is 1 ONLY when ALL inputs are 0.
IMPORTANT: NOR is also called a Universal Gate. Like NAND, any Boolean function can be built using only NOR gates.
| Input A | Input B | A + B | Output F = (A + B)’ | Key Point |
| 0 | 0 | 0 | 1 | NOR of 0,0 = 1 (only case output is 1) |
| 0 | 1 | 1 | 0 | NOR of 0,1 = 0 |
| 1 | 0 | 1 | 0 | NOR of 1,0 = 0 |
| 1 | 1 | 1 | 0 | NOR of 1,1 = 0 |
XOR Gate (Exclusive OR)
Boolean Expression: F = A XOR B = A + B with circle = A’B + AB’
Rule: Output is 1 when inputs are DIFFERENT. Output is 0 when inputs are SAME.
| Input A | Input B | Output F = A XOR B | Explanation |
| 0 | 0 | 0 | Same inputs (both 0) → Output 0 |
| 0 | 1 | 1 | Different inputs → Output 1 |
| 1 | 0 | 1 | Different inputs → Output 1 |
| 1 | 1 | 0 | Same inputs (both 1) → Output 0 |
XNOR Gate (Exclusive NOR)
Boolean Expression: F = A XNOR B = A’B’ + AB
Rule: Output is 1 when inputs are SAME. Output is 0 when inputs are DIFFERENT. (Opposite of XOR)
| Input A | Input B | Output F = A XNOR B | Explanation |
| 0 | 0 | 1 | Same (both 0) → Output 1 |
| 0 | 1 | 0 | Different → Output 0 |
| 1 | 0 | 0 | Different → Output 0 |
| 1 | 1 | 1 | Same (both 1) → Output 1 |
Complete Logic Gate Summary Table
| Gate | Symbol | Boolean Expr | Output Rule | Universal Gate? | Real-World Analogy |
| AND | A · B or AB | F = AB | 1 only when ALL inputs are 1 | No | Switches in SERIES: both must be ON |
| OR | A + B | F = A+B | 1 when ANY input is 1 | No | Switches in PARALLEL: either ON |
| NOT | A’ or A-bar | F = A’ | Opposite of input | No | Inverter switch: ON becomes OFF |
| NAND | (AB)’ | F = (AB)’ | 0 only when ALL inputs are 1 | YES | Complement of AND |
| NOR | (A+B)’ | F = (A+B)’ | 1 only when ALL inputs are 0 | YES | Complement of OR |
| XOR | A XOR B | F = A’B+AB’ | 1 when inputs are DIFFERENT | No | Detects inequality |
| XNOR | A XNOR B | F = A’B’+AB | 1 when inputs are SAME | No | Equality detector |
Boolean Algebra Laws and Theorems: Complete Reference
Boolean algebra has a set of fundamental laws and theorems that govern how Boolean expressions can be simplified and manipulated. These are the core of the Boolean Algebra chapter and are tested directly in SSC exams:
1. Basic Identity Laws
| Law Name | AND Form | OR Form | Explanation |
| Identity Law | A · 1 = A | A + 0 = A | ANDing with 1 keeps value; ORing with 0 keeps value |
| Null / Annihilation Law | A · 0 = 0 | A + 1 = 1 | ANDing with 0 gives 0 always; ORing with 1 gives 1 always |
| Idempotent Law | A · A = A | A + A = A | ANDing a variable with itself returns same variable; same for OR |
| Complement Law | A · A’ = 0 | A + A’ = 1 | Variable AND its complement is always 0; OR with complement is always 1 |
| Double Complement | (A’)’ = A | (A’)’ = A | Complementing twice returns original variable |
2. Commutative, Associative, and Distributive Laws
| Law Name | AND Form | OR Form | Explanation |
| Commutative Law | A · B = B · A | A + B = B + A | Order of operands does not matter |
| Associative Law | (A·B)·C = A·(B·C) | (A+B)+C = A+(B+C) | Grouping does not affect the result |
| Distributive Law | A·(B+C) = A·B + A·C | A+(B·C) = (A+B)·(A+C) | Distribution works both ways in Boolean algebra |
3. Absorption Laws
| Law | Expression | Simplified To | Proof / Explanation |
| Absorption Law 1 | A + A·B | A | A OR (A AND B) simplifies to just A |
| Absorption Law 2 | A · (A + B) | A | A AND (A OR B) simplifies to just A |
| Absorption Law 3 | A + A’·B | A + B | Useful simplification in circuit design |
| Absorption Law 4 | A · (A’ + B) | A · B | Complement absorption simplification |
Proof of Absorption Law 1: A + AB = A·1 + A·B = A·(1+B) = A·1 = A
Proof of Absorption Law 2: A·(A+B) = A·A + A·B = A + AB = A (by Law 1)
4. De Morgan’s Theorems – Most Tested in SSC Exams
De Morgan’s theorems are named after Augustus De Morgan (British mathematician, 1806-1871). They are the most important and most frequently tested theorems in Boolean algebra across all SSC and competitive exams:
| Theorem | Statement | Formal Notation | Verbal Description |
| De Morgan’s First Theorem | The complement of a product (AND) equals the sum (OR) of the complements | (A · B)’ = A’ + B’ | NOT(A AND B) = NOT A OR NOT B |
| De Morgan’s Second Theorem | The complement of a sum (OR) equals the product (AND) of the complements | (A + B)’ = A’ · B’ | NOT(A OR B) = NOT A AND NOT B |
De Morgan’s First Theorem – Proof by Truth Table:
| A | B | A’ | B’ | A·B | (A·B)’ [Left Side] | A’+B’ [Right Side] | Equal? |
| 0 | 0 | 1 | 1 | 0 | 1 | 1+1=1 | YES |
| 0 | 1 | 1 | 0 | 0 | 1 | 1+0=1 | YES |
| 1 | 0 | 0 | 1 | 0 | 1 | 0+1=1 | YES |
| 1 | 1 | 0 | 0 | 1 | 0 | 0+0=0 | YES |
De Morgan’s Second Theorem – Proof by Truth Table:
| A | B | A’ | B’ | A+B | (A+B)’ [Left Side] | A’·B’ [Right Side] | Equal? |
| 0 | 0 | 1 | 1 | 0 | 1 | 1·1=1 | YES |
| 0 | 1 | 1 | 0 | 1 | 0 | 1·0=0 | YES |
| 1 | 0 | 0 | 1 | 1 | 0 | 0·1=0 | YES |
| 1 | 1 | 0 | 0 | 1 | 0 | 0·0=0 | YES |
Extended De Morgan’s Theorems (for 3+ variables):
- (A · B · C)’ = A’ + B’ + C’
- (A + B + C)’ = A’ · B’ · C’
- The pattern: complement of AND of n variables = OR of all n complements
- The pattern: complement of OR of n variables = AND of all n complements
5. Duality Principle
The Duality Principle states that every Boolean theorem remains valid if you interchange AND with OR and interchange 0 with 1 throughout the expression. This means for every Boolean law, there exists a dual law obtained by this interchange.
| Original Law | Dual Law | Transformation Applied |
| A + 0 = A | A · 1 = A | OR→AND, 0→1 |
| A + 1 = 1 | A · 0 = 0 | OR→AND, 1→0 |
| A + A = A | A · A = A | OR→AND |
| A + A’ = 1 | A · A’ = 0 | OR→AND, 1→0 |
| (A + B)’ = A’·B’ | (A·B)’ = A’+B’ | OR→AND, AND→OR (De Morgan’s) |
| A + AB = A | A·(A+B) = A | OR→AND (Absorption) |
Boolean Expression Simplification: Methods and Examples
Boolean algebra simplification reduces complex expressions to simpler forms, which translates to fewer gates and cheaper, faster circuits. This is a key skill tested in SSC JE and advanced competitive exams:
Method 1: Algebraic Simplification Using Boolean Laws
Apply Boolean laws step-by-step to reduce the expression.
| Step | Expression | Law / Theorem Applied |
| Given | F = AB + AB’ | Original expression |
| Step 1 | F = A(B + B’) | Distributive Law: A is common factor |
| Step 2 | F = A · 1 | Complement Law: B + B’ = 1 |
| Step 3 | F = A | Identity Law: A · 1 = A |
| Result | F = AB + AB’ simplifies to F = A | The expression AB + AB’ always equals A |
| Step | Expression | Law Applied |
| Given | F = A + A’B | Original |
| Step 1 | F = (A + A’)(A + B) | Distributive Law: A + XY = (A+X)(A+Y) |
| Step 2 | F = 1 · (A + B) | Complement Law: A + A’ = 1 |
| Step 3 | F = A + B | Identity Law: 1·X = X |
| Result | A + A’B = A + B | Absorption Law 3 confirmed |
| Step | Expression | Law Applied |
| Given | F = ABC + ABC’ + AB’C | Complex SOP expression |
| Step 1 | F = AB(C + C’) + AB’C | Factor AB from first two terms |
| Step 2 | F = AB·1 + AB’C | Complement: C+C’=1 |
| Step 3 | F = AB + AB’C | Identity: AB·1=AB |
| Step 4 | F = A(B + B’C) | Factor A |
| Step 5 | F = A(B + C) | Absorption: B+B’C = B+C |
| Result | F = AB + AC | Distribute: A(B+C) = AB+AC |
Method 2: Karnaugh Map (K-Map) Simplification
The Karnaugh Map (K-Map) is a visual method for simplifying Boolean expressions. It arranges truth table values in a grid so that adjacent cells differ by only one variable (using Gray code ordering). Groups of 1s in the K-Map correspond to simplified terms.
2-Variable K-Map
A 2-variable K-Map has 2² = 4 cells arranged in a 1×4 or 2×2 grid:
| B=0 | B=1 | |
| A=0 | Cell m0 (A’B’) | Cell m1 (A’B) |
| A=1 | Cell m2 (AB’) | Cell m3 (AB) |
3-Variable K-Map
A 3-variable K-Map has 2³ = 8 cells. The column headings use Gray code: 00, 01, 11, 10 (NOT binary order) to ensure adjacent cells differ by exactly one variable:
| A \ BC | BC=00 | BC=01 | BC=11 | BC=10 |
| A=0 | m0 (A’B’C’) | m1 (A’B’C) | m3 (A’BC) | m2 (A’BC’) |
| A=1 | m4 (AB’C’) | m5 (AB’C) | m7 (ABC) | m6 (ABC’) |
4-Variable K-Map
A 4-variable K-Map has 2⁴ = 16 cells arranged in a 4×4 grid. Both rows and columns use Gray code ordering:
| AB \ CD | CD=00 | CD=01 | CD=11 | CD=10 |
| AB=00 | m0 | m1 | m3 | m2 |
| AB=01 | m4 | m5 | m7 | m6 |
| AB=11 | m12 | m13 | m15 | m14 |
| AB=10 | m8 | m9 | m11 | m10 |
K-Map Grouping Rules
- Groups (pairs, quads, octets) must contain 1, 2, 4, 8, or 16 cells (powers of 2)
- Every cell containing 1 must be covered by at least one group
- Groups should be as LARGE as possible to achieve maximum simplification
- Groups can overlap (a cell can belong to multiple groups)
- Groups can wrap around the edges of the K-Map (top-bottom and left-right adjacency)
- The result is a Sum of Products (SOP) expression with one product term per group
K-Map Simplification: Group Size and Simplification Benefit
| Group Size (Cells) | Variables Eliminated | Remaining Variables | Example |
| 1 cell (single) | 0 variables | All n variables remain | m5 = AB’C (for 3-var map) |
| 2 cells (pair) | 1 variable | n-1 variables remain | m1+m3 → A’C (BC term eliminates) |
| 4 cells (quad) | 2 variables | n-2 variables remain | m1+m3+m5+m7 → C (only C remains) |
| 8 cells (octet) | 3 variables | n-3 variables remain | Half of all cells: single literal result |
| All 2^n cells | n variables | 0 variables: result = 1 | Entire map is 1s: function = 1 |
Sum of Products (SOP) and Product of Sums (POS) Forms
Boolean expressions can be written in two standard canonical forms that are important for SSC JE and digital design:
| Feature | Sum of Products (SOP) | Product of Sums (POS) |
| Definition | An OR of AND terms; each AND term is a product term | An AND of OR terms; each OR term is a sum term |
| Also Called | Disjunctive Normal Form (DNF) | Conjunctive Normal Form (CNF) |
| Basic Structure | F = AB + BC’ + A’C | F = (A+B)·(B+C’)·(A’+C) |
| Implemented With | AND gates feeding into OR gate | OR gates feeding into AND gate |
| Derived From | Cells with value 1 in the truth table | Cells with value 0 in the truth table |
| Min-terms | SOP contains sum of min-terms | – |
| Max-terms | – | POS contains product of max-terms |
| Example | F = A’B’C + A’BC + AB’C + ABC = A’C + BC | F = (A+B+C)(A+B+C’)(A+B’+C)(A’+B+C) |
| K-Map Use | Group 1s to find SOP | Group 0s to find POS |
Universal Gates: Building All Functions from NAND or NOR
NAND and NOR are called Universal Gates because any Boolean function can be implemented using only one type of gate. This is practically important because chip manufacturers can standardize on a single gate type to build all circuits. SSC exams directly test this property:
Implementing Basic Gates Using Only NAND Gates
| Gate to Implement | NAND Implementation | Boolean Verification |
| NOT A | NAND(A, A) | (A·A)’ = (A)’ = A’ (since A·A=A) |
| AND(A,B) | NAND(NAND(A,B), NAND(A,B)) | [(AB)’]’ = AB (double complement) |
| OR(A,B) | NAND(NAND(A,A), NAND(B,B)) | (A’·B’)’ = A+B (De Morgan’s) |
| NOR(A,B) | NAND(NAND(NAND(A,A), NAND(B,B)), …) | Combine OR result with NAND inversion |
| XNOR(A,B) | Multiple NAND gates | Requires 5 NAND gates for implementation |
Implementing Basic Gates Using Only NOR Gates
| Gate to Implement | NOR Implementation | Boolean Verification |
| NOT A | NOR(A, A) | (A+A)’ = (A)’ = A’ |
| OR(A,B) | NOR(NOR(A,B), NOR(A,B)) | [(A+B)’]’ = A+B |
| AND(A,B) | NOR(NOR(A,A), NOR(B,B)) | (A’+B’)’ = A·B (De Morgan’s) |
| NAND(A,B) | Combine AND from NOR with NOR inversion | Multiple NOR gates required |
| XOR(A,B) | Multiple NOR gates | Requires 5 NOR gates for implementation |
Combinational Logic Circuits: Adders and Other Important Circuits
Combinational circuits are digital circuits where the output depends only on the current inputs (no memory). They are built from logic gates implementing Boolean functions. The most important for SSC exams are:
Half Adder
A Half Adder adds two single binary bits and produces a Sum and a Carry output. It cannot handle a carry from a previous stage.
| Input A | Input B | Sum (S) | Carry (C) | Boolean Expression |
| 0 | 0 | 0 | 0 | S = A XOR B = A’B+AB’; C = A AND B = AB |
| 0 | 1 | 1 | 0 | |
| 1 | 0 | 1 | 0 | |
| 1 | 1 | 0 | 1 | Carry is generated when both inputs are 1 |
Half Adder Equations: Sum = A XOR B; Carry = A AND B
Full Adder
A Full Adder adds three binary bits: two input bits (A, B) and a carry-in (Cin) from the previous stage. It produces Sum and Carry-out. Full adders are chained to add multi-bit binary numbers.
| A | B | Cin | Sum | Carry-out | Explanation |
| 0 | 0 | 0 | 0 | 0 | No carry in; 0+0+0=0 |
| 0 | 0 | 1 | 1 | 0 | Carry in only; sum=1 |
| 0 | 1 | 0 | 1 | 0 | B only; sum=1 |
| 0 | 1 | 1 | 0 | 1 | B+Cin=2; Sum=0, Carry=1 |
| 1 | 0 | 0 | 1 | 0 | A only; sum=1 |
| 1 | 0 | 1 | 0 | 1 | A+Cin=2; Sum=0, Carry=1 |
| 1 | 1 | 0 | 0 | 1 | A+B=2; Sum=0, Carry=1 |
| 1 | 1 | 1 | 1 | 1 | A+B+Cin=3; Sum=1, Carry=1 |
Full Adder Equations: Sum = A XOR B XOR Cin; Carry-out = AB + BCin + ACin
Other Important Combinational Circuits
| Circuit | Function | Application |
| Half Subtractor | Subtracts two binary bits; produces Difference and Borrow | Basic binary subtraction unit |
| Full Subtractor | Subtracts three bits including borrow-in; produces Difference and Borrow-out | Multi-bit binary subtraction |
| Multiplexer (MUX) | Selects one of multiple input data lines based on select signals; data selector | Data routing; communication systems |
| Demultiplexer (DEMUX) | Sends one input to one of multiple output lines based on select signals | Data distribution; broadcasting |
| Encoder | Converts 2^n input lines to n-bit binary output code | Keyboard encoding; priority encoding |
| Decoder | Converts n-bit binary input to 2^n output lines | Memory address decoding; display driving |
| Comparator | Compares two binary numbers; outputs if A>B, A=B, or A<B | Sorting; magnitude comparison circuits |
| Parity Generator / Checker | Generates or checks parity bit for error detection | Serial data communication; memory |
Sequential Logic Circuits: Flip-Flops and Latches
Unlike combinational circuits, sequential circuits have memory. Their output depends on both current inputs AND previous state (stored in memory elements). The basic memory elements are flip-flops and latches:
| Memory Element | Type | Inputs | Function | SSC Key Point |
| SR Latch | Sequential / Async | S (Set), R (Reset) | S=1 sets output to 1; R=1 resets to 0; S=R=1 is forbidden state | Basic 1-bit memory; S=R=1 is invalid/undefined |
| D Flip-Flop | Sequential / Sync | D (Data), CLK | Output follows D input on clock edge; simple 1-bit storage | Most common flip-flop; Q=D after clock pulse |
| JK Flip-Flop | Sequential / Sync | J, K, CLK | J=K=0: no change; J=1,K=0: set; J=0,K=1: reset; J=K=1: toggle | Eliminates SR flip-flop’s forbidden state; J=K=1 toggles output |
| T Flip-Flop | Sequential / Sync | T (Toggle), CLK | T=0: no change; T=1: output toggles (flips) on each clock pulse | Used in counters; T=1 makes it toggle every clock cycle |
Boolean Algebra Applied: Practical Examples
Here are complete worked examples showing how Boolean algebra is used to simplify real circuit problems:
Example 1: Simplify F = AB + AB’ + A’B
| Step | Expression | Law Used |
| Given | F = AB + AB’ + A’B | Original |
| Step 1 | F = A(B + B’) + A’B | Factor A from first two terms |
| Step 2 | F = A · 1 + A’B | Complement Law: B+B’=1 |
| Step 3 | F = A + A’B | Identity Law |
| Step 4 | F = A + B | Absorption Law 3: A+A’B = A+B |
| Result | F = A + B | Simplified from 3 terms to 2 variables |
Example 2: Prove De Morgan’s Using Algebraic Manipulation
| Step | For (AB)’ = A’ + B’ | Verification |
| Start | Need to show (AB)(A’+B’) = 0 and (AB)+(A’+B’) = 1 to prove complement | If X·Y=0 and X+Y=1, then Y=X’ |
| Product | (AB)(A’+B’) = ABA’ + ABB’ = A·A’·B + A·B·B’ | Distribute |
| Simplify | = 0·B + A·0 = 0 + 0 = 0 | Complement: A·A’=0, B·B’=0 |
| Sum | (AB)+(A’+B’) = A(1+B’)+(1-A)… use truth table method | Both sides give same result for all A,B |
| Conclusion | Truth table proof (previous section) confirms (AB)’ = A’+B’ | De Morgan’s First Theorem proven |
Example 3: Minimize Using K-Map (3-variable)
Given: F(A,B,C) = Sum of minterms m(1,2,3,5,7) = m1+m2+m3+m5+m7
| A \ BC | BC=00 | BC=01 | BC=11 | BC=10 |
| A=0 | m0=0 | m1=1 | m3=1 | m2=1 |
| A=1 | m4=0 | m5=1 | m7=1 | m6=0 |
- Group 1: m1+m3+m5+m7 (column BC=01 and BC=11 for both rows) = C (only C is common)
- Group 2: m2+m3 (A=0, BC=11 and BC=10) = A’B (A=0, B=1 in both)
- Final Result: F = C + A’B
Important Boolean Algebra Identities Quick Reference
| Identity | Expression | Notes |
| AND with 0 | A · 0 = 0 | Any variable ANDed with 0 is always 0 |
| AND with 1 | A · 1 = A | ANDing with 1 does not change value |
| OR with 0 | A + 0 = A | ORing with 0 does not change value |
| OR with 1 | A + 1 = 1 | Any variable ORed with 1 is always 1 |
| AND self | A · A = A | A variable ANDed with itself is itself |
| OR self | A + A = A | A variable ORed with itself is itself |
| AND complement | A · A’ = 0 | A AND its complement is always 0 |
| OR complement | A + A’ = 1 | A OR its complement is always 1 |
| Double NOT | (A’)’ = A | Two negations cancel out |
| Absorption 1 | A + AB = A | Longer term absorbed by shorter |
| Absorption 2 | A(A+B) = A | Same as absorption 1 in dual form |
| Absorption 3 | A + A’B = A+B | Complement absorption |
| De Morgan 1 | (AB)’ = A’ + B’ | Complement of product = sum of complements |
| De Morgan 2 | (A+B)’ = A’B’ | Complement of sum = product of complements |
| Consensus | AB + A’C + BC = AB + A’C | BC is redundant (Consensus theorem) |
| XOR definition | A XOR B = A’B + AB’ | Output 1 when inputs differ |
| XNOR definition | A XNOR B = A’B’ + AB | Output 1 when inputs are same |
| XOR with 0 | A XOR 0 = A | No change |
| XOR with 1 | A XOR 1 = A’ | Complement |
| XOR self | A XOR A = 0 | Same inputs: always 0 |
| XNOR self | A XNOR A = 1 | Same inputs always match: 1 |
Exam Frequency and Priority: Boolean Algebra Topics
| Topic | Exam Frequency | Difficulty | Priority |
| AND, OR, NOT gate truth tables | Very High | Easy | Must Study First |
| NAND and NOR = Universal Gates | Very High | Easy | Must Study First |
| De Morgan’s Theorems (both) | Very High | Medium | Must Study First |
| XOR gate: output 1 when inputs differ | Very High | Easy | Must Study First |
| Boolean laws: Identity, Null, Complement | High | Easy | Must Study First |
| NAND gate truth table | High | Easy | Must Study First |
| NOR gate truth table | High | Easy | Must Study First |
| Simplification using Boolean laws | High | Medium | Important |
| Absorption Laws | High | Medium | Important |
| Duality Principle | Medium-High | Medium | Important |
| K-Map simplification (2 and 3 variable) | Medium-High | Hard | Important (JE level) |
| SOP and POS forms | Medium | Medium-Hard | Important (JE level) |
| Half Adder circuit and equations | Medium | Medium | Good to Know |
| Full Adder circuit and equations | Medium | Medium-Hard | Good to Know (JE) |
| JK Flip-Flop: J=K=1 toggles | Medium | Medium | Good to Know |
| 4-variable K-Map | Low-Medium | Hard | SSC JE only |
| Consensus Theorem | Low | Hard | Advanced only |
Quick Revision: Top 30 Boolean Algebra Facts for SSC Exams
- Boolean algebra was developed by George Boole (1815-1864) in his work published in 1854
- Claude Shannon applied Boolean algebra to electronic circuits in his 1937 master’s thesis
- Boolean variables can only be 0 (False) or 1 (True); no other values exist
- Three basic operations: AND (multiplication), OR (addition), NOT (complement)
- AND gate output is 1 ONLY when ALL inputs are 1
- OR gate output is 1 when ANY input is 1
- NOT gate (Inverter) produces the opposite of its input
- NAND gate output is 0 ONLY when ALL inputs are 1 (complement of AND)
- NOR gate output is 1 ONLY when ALL inputs are 0 (complement of OR)
- XOR gate output is 1 when inputs are DIFFERENT; 0 when SAME
- XNOR gate output is 1 when inputs are SAME; 0 when DIFFERENT (opposite of XOR)
- NAND and NOR are called Universal Gates because any function can be built from them alone
- De Morgan’s First Theorem: (A · B)’ = A’ + B’
- De Morgan’s Second Theorem: (A + B)’ = A’ · B’
- Memory rule for De Morgan’s: Break the bar, change the operation (AND to OR or vice versa)
- A · 0 = 0 (AND with 0 always gives 0)
- A + 1 = 1 (OR with 1 always gives 1)
- A · A’ = 0 (variable AND its complement is always 0)
- A + A’ = 1 (variable OR its complement is always 1)
- (A’)’ = A (double complement returns original)
- Absorption Law: A + AB = A (longer term is absorbed by shorter)
- Absorption Law: A + A’B = A + B (complement absorption)
- Duality Principle: swap AND with OR and 0 with 1 to get the dual of any law
- K-Map groups must be powers of 2: 1, 2, 4, 8, or 16 cells
- Larger K-Map groups give more simplification (eliminate more variables)
- K-Map columns/rows use Gray code order: 00, 01, 11, 10 (NOT binary order)
- Half Adder: Sum = A XOR B; Carry = AB
- Full Adder: Sum = A XOR B XOR Cin; Carry-out = AB + BCin + ACin
- JK Flip-Flop: J=K=0 (no change), J=1,K=0 (Set), J=0,K=1 (Reset), J=K=1 (Toggle)
- T Flip-Flop: T=0 (no change), T=1 (output toggles)
Study Plan: 5 Days to Master Boolean Algebra for SSC
Day 1: Foundations – Variables, Gates, and Truth Tables
- Study Boolean variables, literals, expressions, and the three basic operations
- Master all 7 logic gates: AND, OR, NOT, NAND, NOR, XOR, XNOR
- Draw and memorize all truth tables from scratch (not just copy – generate them)
- Understand why NAND and NOR are Universal Gates
Day 2: Boolean Laws and Theorems
- Study all basic laws: Identity, Null, Idempotent, Complement, Double Complement
- Learn Commutative, Associative, and Distributive Laws
- Master Absorption Laws with proofs
- Thoroughly study De Morgan’s Both Theorems with truth table proofs
Day 3: Expression Simplification
- Practice algebraic simplification using Boolean laws on at least 10 different expressions
- Study the step-by-step examples in this article and replicate them independently
- Learn SOP (Sum of Products) and POS (Product of Sums) standard forms
- Study the Duality Principle
Day 4: K-Map Simplification
- Draw and understand 2-variable and 3-variable K-Maps
- Practice the Gray code ordering of K-Map headings
- Learn K-Map grouping rules and practice grouping with various examples
- Solve the 3-variable K-Map example in this article independently
Day 5: Combinational Circuits, Flip-Flops, and Practice
- Study Half Adder and Full Adder circuits and their Boolean equations
- Study JK Flip-Flop and T Flip-Flop behavior
- Revise all 30 quick revision facts
- Solve 30 to 40 Boolean algebra questions from SSC previous year papers
READ ALSO: SSC Computer Number System Conversion PPT Slides (LEC #14)
(FAQs)
Q1. Who invented Boolean Algebra?
Boolean algebra was developed by George Boole (1815-1864), a British mathematician. His landmark work ‘An Investigation of the Laws of Thought’ published in 1854 established the mathematical framework. Claude Shannon (1916-2001), an American electrical engineer, later applied Boolean algebra to electronic switching circuits in his 1937 master’s thesis at MIT, creating the foundation for modern digital computer design.
Q2. What is De Morgan’s Theorem and how do you remember it?
De Morgan’s First Theorem states that (A · B)’ = A’ + B’ — the complement of a product equals the sum of complements. The Second Theorem states that (A + B)’ = A’ · B’ — the complement of a sum equals the product of complements. The easy memory rule is: ‘Break the bar, change the operation.’ When you remove the bar from over an expression, the AND becomes OR or OR becomes AND, and each variable gets complemented.
Q3. What are Universal Gates and why are NAND and NOR called that?
NAND and NOR are called Universal Gates because any Boolean logic function — no matter how complex — can be implemented using only NAND gates, or alternatively using only NOR gates. This is practically important because chip manufacturers can simplify production by creating only one type of gate. You can build NOT, AND, OR, XOR, and any other function entirely from NAND gates or entirely from NOR gates.
Q4. What is the difference between XOR and XNOR?
XOR (Exclusive OR) gives output 1 when the inputs are DIFFERENT and 0 when they are SAME. XNOR (Exclusive NOR) is the exact opposite: output 1 when inputs are SAME and 0 when DIFFERENT. XOR is sometimes called the ‘inequality detector’ and XNOR the ‘equality detector’. XOR Boolean expression: A’B + AB’. XNOR expression: A’B’ + AB.
Q5. What is a Karnaugh Map and how does it simplify Boolean expressions?
A Karnaugh Map (K-Map) is a visual grid-based tool for simplifying Boolean expressions. It arranges all possible input combinations in a grid where adjacent cells differ by exactly one variable (Gray code ordering). By identifying and grouping adjacent cells containing 1s into groups of sizes that are powers of 2, you can read simplified product terms directly. Larger groups eliminate more variables, giving greater simplification.
Q6. What is the difference between a Half Adder and a Full Adder?
A Half Adder adds two single binary bits (A and B) and produces two outputs: Sum (S = A XOR B) and Carry (C = AB). It cannot handle carry input from a previous stage. A Full Adder adds three bits — two data bits (A, B) and a carry-in (Cin) from the previous stage — producing Sum (S = A XOR B XOR Cin) and Carry-out (Cout = AB + BCin + ACin). Multiple Full Adders are chained to add multi-bit binary numbers.
Q7. How many slides are in the Boolean Algebra PPT (LEC 15)?
The Boolean Algebra Complete Batch PPT (LEC 15) contains 47 slides. It is Serial Number 015 of the Complete Foundation Batch for All SSC and Other Exams PPT Series. The file size is 25 MB and is available for free download at https://slideshareppt.net/.
Q8. What is the Duality Principle in Boolean Algebra?
The Duality Principle states that every valid Boolean theorem or law remains valid if you simultaneously interchange AND (·) with OR (+) and interchange 0 with 1 throughout the expression. For example, the dual of A + 0 = A is A · 1 = A. The dual of De Morgan’s First Theorem (AB)’ = A’+B’ is (A+B)’ = A’·B’. This principle means that for every Boolean law, a corresponding dual law exists automatically.
Conclusion: Boolean Algebra Is the Logic That Makes Computers Think
Boolean Algebra (LEC 15) represents one of the most conceptually profound modules in the entire Complete Foundation Batch PPT Series. George Boole’s 19th-century mathematical system, when applied to electronic switching circuits by Claude Shannon, became the intellectual foundation of the entire digital age. Every logic gate, every processor instruction, every database query, every AI decision algorithm is ultimately built on the same Boolean operations: AND, OR, and NOT.
The 47-slide LEC 15 module covers all the essential Boolean algebra content tested in SSC exams: all 7 logic gates with complete truth tables, the full set of Boolean laws and theorems with proofs, De Morgan’s theorems in depth, Boolean expression simplification, Karnaugh Map methods, SOP and POS canonical forms, universal gates, Half and Full Adder circuits, and flip-flop memory elements.
For maximum exam marks, ensure you can: draw any gate’s truth table from memory, state and apply De Morgan’s both theorems, name NAND and NOR as Universal Gates, simplify Boolean expressions using absorption and complement laws, and explain the XOR vs XNOR difference. These areas generate the majority of Boolean algebra questions in SSC Computer Awareness.
Download the free 25 MB PDF from https://slideshareppt.net/, follow the 5-day study plan, practice simplification problems daily, and complete this final technical chapter with confidence. Boolean Algebra, combined with all previous lectures in the series, gives you a complete and exam-ready foundation in computer science.